High-voltage integrated circuits have been widely used in panel display, communications circuitry, automobile electronics and many other applications. Such a high-voltage integrated circuit typically includes a low-voltage logic section and a high-voltage section which operates under the control of a signal output from the low-voltage logic section and thereafter shifted to a high voltage level after passing through a high-voltage driver circuit containing high-voltage devices.
In general, a high-voltage integrated circuit includes both high-voltage devices and low-voltage devices, the high-voltage devices each incorporating a thick gate oxide which ensures high gate-source resistance for the device and the low-voltage devices each typically employing a thin gate oxide. For example, a conventional High-Voltage Complementary Metal Oxide Semiconductor (HV CMOS) device typically includes a gate oxide with a thickness of about 100 nm, whilst a conventional Low-Voltage (LV) CMOS device typically employs a gate oxide with a thickness of about 2.5 nm. Thus, in order to integrate HV and LV CMOS devices on a single chip, a special technique is needed to form gate oxides of different thicknesses on the same chip.
In this regard, the so-called LOCOS (LOCalised Oxidation of Silicon) scheme using silicon-nitride as a hard mask is an effective method adopted in the prior art to selectively grow thick oxides, serving as isolations (e.g., shallow trench isolations (STIs)) or field oxides, over heavily doped silicon regions except where it is actually intended for active transistors. However, in the prior art, due to a sloping boundary between the active area and the STI, silicon nitride residues topographically resembling sidewalls along the boundary occur after a dry etch process performed on the silicon-nitride hard mask. Such residues will cause defects in subsequent process steps and increase the difficulty to completely remove an underlying pad oxide. This will lead to a border of the active area with sharp corners after a gate oxide is grown, thus decreasing the breakdown voltage of the device being fabricated and deteriorating its gate oxide integrity (GOI) performance.